# 摘要

The use of a foreign metallic cold source (CS) has recently been proposed as a promising approach toward the steep-slope field-effect-transistor (FET). In addition to the selection of source material with desired density of states–energy relation (D(E)), engineering the source:channel interface for gate-tunable channel-barrier is crucial to CS-FETs. However, conventional metal:semiconductor (MS) interfaces generally suffer from strong Fermi level pinning due to the inevitable chemical disorder and defect-induced gap states, precluding the gate tunability of the barriers. By comprehensive materials and device modeling at the atomic scale, it is reported that 2D van der Waals (vdW) MS interfaces, with their atomic sharpness and cleanness, can be considered as general ingredients for CS-FETs. As test cases, InSe-based n-type FETs are studied. It is found that graphene can be spontaneously p-type doped along with slightly opened bandgap around the Dirac-point by interfacing with InSe, resulting in superexponentially decaying hot carrier density with increasing n-type channel-barrier. Moreover, the D(E) relations suggest that 2D transition-metal dichalcogenides and 2D transition-metal carbides are a rich library of CS materials. Graphene, Cd3C2, T-VTe2, H-VTe2, and H-TaTe2 CSs lead to subthreshold swing below 60 mV dec-1. This work broadens the application potentials of 2D vdW MS heterostructures and serves as a springboard for more studies on low-power electronics based on 2D materials.

# 前言

Propelling the current interest in electronics based on 2D materials is the continual discovery of new physical phenomena and the resultant device innovations.[1–4] Field-effect-transistor (FET) technology has been the workhorse of modern semiconductor industry. 2D semiconducting materials such as MoS2, black phosphorus, InSe, and PdSe2 have been widely studied as channel materials to replace bulk silicon because of the ideal electrostatic control of the atomically thin channels.[5–14] Another unique property of 2D materials is the ability to form vertical heterostructures by van der Waals (vdW) interactions without direct chemical bonding.[15–18] This offers considerable freedom in integrating various materials without the constraints of crystal lattice matching for unprecedented functions. In regard to FET devices, it has been predicted by theory and demonstrated by experiment that vdW metal:semiconductor (MS) source/drain-contacts outperform conventional contacts in achieving low contact resistance.[19–22] This has been attributed to the weak Fermi-level (FL) pinning effect because of the less chemical disorder and defect-induced gap states at the 2D vdW MS interfaces.

The reinvention of the semiconductor device technology has been catalyzed by the limits of power dissipation.[23] Due to the thermionic limit, conventional FETs require at least 60 mV of gate voltage to increase the source–drain current by one order of magnitude at room temperature, precluding the continuous scaling of the supply voltage and the decrease of power consumption.[24,25] Various device innovations have been proposed to lower the subthreshold swing (SS) below 60 mV dec−1.[26,27] Tunneling FET (T-FET) by using heterojunction-channel and negative-capacitance FET (NC-FET) by using ferroelectric-gateoxide are most extensively studied.[28–31] However, T-FETs have now been well known for low on-current; meanwhile, NC-FETs can often suffer from large hysteresis. Recently, cold source (CS) has emerged as a promising solution to overcome the limitations of T-FETs and NC-FETs. In a CS-FET, the hot carrier (HC) density of states (DOSs) of the CS should decrease with increasing channel barrier.[32] The function of the CS can be understood by referring to the Landauer–Buttiker formula
$$I = \frac{2e}{h} \int_{-\infty}^{\infty} T(E) D(E) [f(E-E_{F}(S)) - f(E-E_{F}(D))]\ \mathrm{d}E$$
where $T(E)$ is the transmission probability; $D(E)$ is the DOS; $f(E)$ is the Fermi–Dirac distribution function; $E_{F}(S)$ and $E_{F}(D)$ are the Fermi levels of the source and drain, respectively. In a conventional n-type FET, in the ON state, electrons are injected from the highly n-type doped (degenerate) semiconducting region whose conduction band DOS is an increasing function of energy, or from normal metal whose DOS is essentially independent of energy. In the OFF state, due to the thermal Boltzmann distribution, electrons in the source have an energy distribution ($n(E) = D(E) × f(E)$) that spreads (thermal tail) to a value exceeding the potential barrier (hot electrons). Due to the nondecreasing D(E) relationship, the hot electron density can increase with energy, which sets a 60 mV dec−1 limit on SS. However, if injection is from a material whose HC DOS decreases with increasing channel barrier, superexponentially decreasing HC density (n(E)) can be achieved, leading to more localized carrier distribution around the FL without a long thermal tail above the channel barrier. As a result, the device can be switched-off faster because the thermal tail can be more effectively cut off by D(E) according to the above formula, thus breaking the SS limit of the conventional FETs.

$$I = \frac{2e}{h} \int_{-\infty}^{\infty} T(E) D(E) [f(E-E_{F}(S)) - f(E-E_{F}(D))]\ \mathrm{d}E$$

In addition to the desired DOS–energy relation (D(E)) of the source material, source:channel interface with weak FL pinning is crucial to a CS-FET. In fact, the gate-tunability of the channel barrier distinguishes a CS-FET from conventional Schottky-barrier (SB)-FET where the FL of the MS interface is pinned and the barrier height can hardly be tuned by the gate-voltage.

Considering that 2D vdW MS heterostructures show weak FL pinning and enable effective tuning of the SBs, we investigate in this work the feasibility of using such unique heterostructures as general ingredients for CS-FETs. As test cases, monolayer InSe-based n-type high-mobility FETs with prospective 2D CSs are studied. By analyzing the D(E) relation, we find that, in addition to graphene, 2D transition-metal dichalcogenides (TMDs) and 2D transition-metal carbides (MXene) are a rich library of CS materials. Pristine graphene, doped graphene, Cd3C2, T-VTe2, H-VTe2, and H-TaTe2 CSs are found to result in SS below 60 mV dec−1, which can be explained by their desired HC distributions and the gate-tunable source:channel barrier heights. This work opens up new opportunities at the confluence of 2D materials and electronics.

# 结论

The application potentials of 2D vdW MS heterostructures in steep-slope CS-FETs have been studied. According to the DOS(E) relations and the nonchemical natures of the interlayer interactions of various 2D metallic materials, such as graphene, the selected TMDs and MXenes, we anticipate that a plethora of 2D vdW materials can serve as the desired CS materials. As test cases, high-mobility monolayer InSe-based n-type FETs with pristine graphene, doped graphene, Cd3C2, T-VTe2, H-VTe2, and H-TaTe2 CSs have been investigated. These FETs show low SS values below 60 mV dec−1. The suppression of thermal tail contribution to the OFF current has been attributed to the gate-tunable channel barriers as well as the superexponentially decreasing n(E). DOS engineering for steep-slope, low off-current and high on-current CS-FETs, and exploring materials that enable polymorphic integration of metal–semiconductor heterophase homojunction for CS-FETs could be key research opportunities in the future. This work provides new opportunities for low-power electronics based on 2D materials.